Memory
The switch interconnect can move a large amount of data over
two independent memory data buses. Each memory bus is 256
bits wide (32 bytes). The memory bus speed is 83 MHz. This
yields 2.67 GB/sec bandwidth per bus (32 x 83 MHz = 2.6
GB/sec). With two CPUs the bandwidth becomes 5.2 GB/sec.
Memory throughput in this system is maximized by the
following features:
• Two 256-bit wide memory data buses
• Very low memory latency (120 ns) and high bandwidth
with 12 ns clock
• Numerous reliability and availability features, such as
ECC memory and command/address parity
Memory Options
Each memory option consists of four 200-pin DIMM modules.
The DIMMs are synchronous DRAMs. Each system supports
up to four memory options (16 DIMMs) for a total of 4
gigabytes of memory. The options run at a speed of 83 MHz.
Memory options are supported in the following sizes:
• 256 Mbytes
• 512 Mbytes
• 1 Gbyte
Memory Configuration Rules
• A memory option consists of four DIMMs, and all four
DIMMs must be the same size.
• Convention places the largest memory option in slots
marked 0 on the system board.
• Other memory options can be the same size or smaller
than the first memory option.
• Memory options must be installed in slots designated for
each bank. The first bank goes into slots marked 0, the
second bank into slots marked 1, and so on.
System I/O
There are two 64-bit PCI buses. Industry-standard PCI I/O
buses allow you to use inexpensive, widely available I/O
options. Both 32-bit and 64-bit PCI options can be used.
Six slots can be used for PCI controllers, or five slots for PCI
and one slot for an ISA option.
PCI Bus
The industry-standard PCI bus is the number one choice for
high-performance I/O options, such as disk storage and high-
performance video applications.
The PCI bus implementation has the following characteristics:
• Fully compliant with the PCI Version 2.1 Specification
• Operates at 33 MHz, delivering a peak bandwidth of 500
MB/sec; over 250 Mbytes/sec for each PCI bus
• Supports 6 option slots
• Supports peer-to-peer I/O operations
• Supports three address spaces: PCI I/O, PCI memory, and
PCI configuration space
• Supports byte/word, tri-byte, and longword operations
• Exists in noncached address space only
The Adaptec 7895 chip provides the bridge from PCI to SCSI,
providing for support of an internal tape drive.
ISA Bus
The ISA bus provides system support functions and the use of
peripheral devices. An ISA connector is available for devices
that provide functions not offered in a PCI implementation.
The Cypress SIO chip, which provides the bridge between the
PCI bus and the ISA bus, incorporates the logic for the
following:
• ISA interrupt controller
• Speaker driver
• Decoding and control for utility bus peripheral devices
• IDE interface for CD-ROM (no other IDE devices are
supported)
I/O Configuration Rules
A graphics adapter, if present in the system, must be installed
in PCI 0.
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